This invention relates generally to phase demodulators. Specifically, the invention provides a synchronous demodulator for demodulating a four-phase PSK modulated signal on a microwave frequency band. The invention is appropriate for use in communication and broadcasting.
In signal transmission represented by satellite communication and satellite broadcasting on the microwave frequency band, a RFTDM (Radio Frequency Time Division Multiplex) system for transmitting data and various kinds of signals by processing high frequency signals on a time division multiplex basis has recently come into use. There is in use by NHK (Japan Broadcasting Corporation), a high-definition television broadcasting system using a technique known as MUSE (Multiplex Sub-Nyquist Sampling Encoding). This four-phase PSK demodulating system provides increased occupied bandwidth and transmission efficiency.
When a receiver demodulates a four-phase PSK modulated signal upon receiving such a high frequency signal, multistage frequency converter circuits are arranged so as to convert the signal into an intermediate frequency (IF) signal and supply the IF signal to a demodulator. A synchronous demodulating system for regenerating a carrier signal from the four-phase PSK demodulated signal received and demodulating the modulated data using the regenerated carrier signal is usually used for the four-phase PSK demodulator. However, the carrier signal must be regenerated sufficiently rapidly relative to the four-phase PSK modulated signal transmitted in the form of a burst, as shown in FIG. 1, to establish the phasing of the carrier signals within a preamble period. The preamble period is one during which a fixed symbol is used to phase modulate before the actual data to be transmitted is used to phase modulate. For example, a symbol such as (00) may be sent for a period longer than that in the case of a normal symbol.
In the high velocity carrier signal regenerating system, there is generally used a reverse modulating or four-multiple system. The reverse modulating system is advantageous when the frequency of the input carrier signal is high.
FIG. 2 is a block diagram of an example of a carrier regenerating demodulating circuit employing a reverse modulating system. This circuit includes an orthogonal phase demodulating circuit 401, a remodulating circuit 402 and a narrow-band filter circuit 403 forming a carrier signal regenerating loop. The four-phase modulated signal "a" supplied at terminal 301 is demodulated by the orthogonal phase demodulating circuit 401 using regenerated carrier signals "f" and "g". Many unnecessary and undesirable components (in addition to the demodulated signals) are produced by multipliers 302, 303 so the demodulated signals "h" and "i" are passed through low pass filters 305, 306 to remove such undesirable components before being further supplied to limiter circuits 307, 308 and then to the remodulating circuit 402.
In remodulating circuit 402, demodulated signals "h" and "i" and input signals "m" and "l" are multiplied by multipliers 309, 310 and are then added by an adder 312, to obtain a carrier signal "n" containing no modulated component. The carrier signal "n" is passed through a narrow-band filter 313 to improve its S/N ratio. It is then supplied to a limiter circuit 314 to remove amplitude changes. Limiter 314 is coupled to the input of a variable phase shifter 315 which provides signal "g" for use in the orthogonal phase demodulating circuit 401. Phase shifters 304 and 311 are used to provide a delay of .pi./2.
The signal in each portion of the circuit of FIG. 2 will be further described with the aid of numerical expressions to describe the regeneration action of the carrier signal. Assuming that the four-phase PSK modulated signal "a" supplied at input terminal 301 is expressed by(:) EQU a=I cos wt+Q sin wt
(where I, Q=constants having positive and negative values and .vertline.I.vertline.=.vertline.Q.vertline.) and that the reference signals "f", "g" in the orthogonal phase demodulating circuit 401 have a phase error of .psi..sub.1, the following relationships exist: EQU f=-K.sub.1 cos (wt-.psi..sub.1) EQU g=K.sub.1 sin (wt-.psi..sub.1).
Assuming the gains of the multipliers 302, 303 are represented by K.sub.2, the output signals "b" and "c" of the multipliers 302, 303 will become as follows: ##EQU1##
When the signals "b", "c" are supplied to the low pass filters 305, 306, given the gain of the filter is K.sub.3, output signals "d", "e" thereof become(:) EQU d=-K.sub.4 Q sin .psi..sub.1 -K.sub.4 I cos .psi..sub.1 EQU e=K.sub.4 Q cos .psi..sub.1 -K.sub.4 I sin .psi..sub.1
(where K.sub.1, K.sub.2, K.sub.3 /2=K.sub.4.)
When the signals "d", "e" are supplied to the limiter circuits 307. 308, the output signals "h", "i" of the limiter circuits 307, 308 become EQU h=-K.sub.5 I EQU i=K.sub.5 Q
(where K.sub.5 =constant of the limiter circuit), and the values of the signals "h", "i" also become constant when .psi..sub.1 is small. Subsequently, the signals "h", "i" are supplied to the remodulating circuit 402 and multiplied by signals "l", "m". A delay circuit 316 compensates for the delays of the demodulated signals "h", "i" received by the multipliers 309, 310 from the multipliers 302, 303, respectively. Assuming that the delays (phase changes) are .psi..sub.2, the signals "l", "m" are expressed by EQU l=I cos (wt-.psi..sub.2)+Q sin (wt-.psi..sub.2) EQU m=-Q cos (wt-.psi..sub.2)+I sin (wt-.psi..sub.2)
(where the gains of the delay circuit 316 and the phase shifter 311 are set as 1 for brevity).
Accordingly, the output signals "j" and "k" of the multipliers 309, 310 become as follows when the gains thereof are set at K.sub.6 (:) EQU j=IQK.sub.7 cos (wt-.psi..sub.2)-I.sup.2 K.sub.7 sin (wt-.psi..sub.2) EQU k=IQK.sub.7 cos (wt-.psi..sub.2)+Q.sup.2 K.sub.7 sin (wt-.psi..sub.2)
(where K.sub.7 =K.sub.4 =K.sub.5 .multidot.K.sub.6).
When the gain of the adder 312 is set at 1, the output signal n thereof is expressed by(:) EQU n=(I.sup.2 +Q.sup.2).multidot.K.sub.7 sin (wt-.psi..sub.2)=K.sub.8 sin (wt-.psi..sub.2)
(where K.sub.8 =(I.sup.2 +Q.sup.2).multidot.K.sub.7 =constant), which is processed by narrow band filter 313, the limiter circuit 314 and variable phase shifter 315 to become reference signals "f", "g" of the orthogonal demodulating circuit 401. The variable shifter 315 is used to adjust the phase and gain so that the output signal "g" may become K.multidot.sin wt. The carrier signal is thus regenerated.
The four-phase PSK modulated signal (hereinafter referred to as the signal received) supplied to the demodulator thus constructed is, as set forth above, the intermediate frequency signal subjected to frequency conversion by multi-stage frequency converter circuits from the microwave frequency band. Its frequency stability depends on the stability of a local oscillator in the frequency converter circuits. When the input signal frequency fluctuates in the four-phase PSK demodulator, however, the frequency of the regenerated carrier signal "n" passed through the narrow-band filter 313 is also fluctuated and there is thus produced the difference in phase between the input signal "n" and output signal "o" of filter 313. Consequently, the phase of the regenerated signal "g" becomes ambiguous.
Although it may be attempted to stabilize the frequency of the intermediate frequency signal by using a crystal oscillation circuit in the local oscillation circuit, that arrangement is disadvantageous in view of circuit arrangement and production cost.
An additional disadvantage is that, because the carrier signal frequency of the demodulator normally becomes high when the data transmission rate is high, it becomes difficult to design and construct narrow-band filter 313, limiter circuit 314 and the like.